Semiconductor gate structure and method for fabricating a semiconductor gate structure
US7045422B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 27, 2004 |
| Grant date | May 16, 2006 |
| Priority date | — |
| Expiry date | May 27, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/021
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a semiconductor gate structure including depositing at least one sacrificial layer on a semiconductor substrate; patterning the at least one sacrificial layer to form at least one cutout in the at least one sacrificial layer for uncovering the semiconductor substrate; forming a sidewall spacer over the sidewalls of the at least one sacrificial layer in the at least one cutout; forming a gate dielectric on the semiconductor substrate in the cutout; providing a gate electrode in the at least one cutout in the at lest one sacrificial layer; and removing the at least one sacrificial layer for the uncovering the gate electrode surrounded by the sidewall spacer. A semiconductor device is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.