Method for fabricating shallow trenches
US7045437B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 27, 2005 |
| Grant date | May 16, 2006 |
| Priority date | — |
| Expiry date | Jun 27, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76237
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming shallow trenches used, for example, in shallow trench isolation includes the steps of providing a p-type silicon substrate, forming a layer in the p-type silicon substrate, wherein the layer includes p-type silicon interposed between n-type silicon. The p-type silicon layer interposed between the n-type silicon is then subject to an anodization process to form porous silicon. The porous silicon regions are then oxidized. The porosity of the silicon layer may be controlled to create an isolation region that is either substantially flush with, above, or below an upper surface of the n-type top layer. For example, by adjusting the anodization time, a retrograde cross-sectional profile of the shallow trench can be obtained that leads to improved isolation between adjacent devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.