Semiconductor protection device
US7045877B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 23, 2003 |
| Grant date | May 16, 2006 |
| Priority date | — |
| Expiry date | Nov 21, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/615
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The invention is directed to improve resistance to destruction of a semiconductor device. A protection circuit having a plurality of bipolar transistors which are Darlington connected between outputs (collector and emitter) of an amplification circuit of a high output is electrically connected in parallel with the amplification circuit. The amplification circuit has a plurality of unit HBTs (Heterojunction Bipolar Transistors) which are connected in parallel with each other. The protection circuit has a two-stage configuration including a first group of a protection circuit having a plurality of bipolar transistors Q1 to Q5 and a second group of a protection circuit having a plurality of bipolar transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.