Reuse in semiconductor measurement recipes
US7047101B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 7, 2003 |
| Grant date | May 16, 2006 |
| Priority date | — |
| Expiry date | Jun 21, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/02
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A semiconductor measurement recipe architecture organized to include reusable sub-recipes, each defining at least one parameter associated with either a semiconductor wafer and/or a semiconductor disposed thereon, is disclosed. This recipe architecture will include a set of parameter dependencies, one or more which having a respective relationship with of the sub-recipes to permit safe and reliable sub-recipe reuse. Also disclosed is a recipe generation method including: determining an appropriate baseline existing recipe that's organized to include a set of parameter dependencies and dependency related sub-recipes; perceiving a dependency change; determining which, if any, of the sub-recipes of the existing recipe remain unaffected after the dependency change(s); and generating a new recipe using at least one of the sub-recipes found to be unaffected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.