Clustered processors in an emulation engine
US7047179B2 · kind B2 · utility
3Cited by
87References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 11, 2003 |
| Grant date | May 16, 2006 |
| Priority date | — |
| Expiry date | Feb 1, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/331
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Clusters of processors are interconnected as an emulation engine such that processors share input and data stacks, and the setup and storing of results are done in parallel, but the output of one evaluation unit is connected to the input of the next evaluation unit. A set of ‘cascade’ connections provides access to the intermediate values. By tapping intermediate values from one processor, and feeding them to the next, a significant emulation speedup is achieved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.