Method and apparatus for accessing memories having a time-variant response over a PCI bus by using two-stage DMA transfers
US7047328B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 13, 2001 |
| Grant date | May 16, 2006 |
| Priority date | — |
| Expiry date | Jan 19, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0024
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention relates to an apparatus and a method for accessing memories having a time-variant response over a PCI bus by using two-stage DMA transfers. The invention provides a method for executing a read request over a PCI bus by transferring the requested data from a main memory of a PCI card to a device located on the PCI bus, comprising the steps of obtaining an access request from a read access queue, transferring, by a first DMA transfer, the requested data from the main memory to a buffer memory on the PCI card, and transferring, by a second DMA transfer, the data from the buffer memory to the device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.