Semiconductor multi-package module having inverted second package and including additional die or stacked package on second package
US7049691B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 8, 2003 |
| Grant date | May 23, 2006 |
| Priority date | — |
| Expiry date | Oct 8, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor multi-package module has stacked lower and upper packages, each of which includes a die attached to a substrate, in which the second package is inverted, and in which the upper and lower substrates are interconnected by wire bonding; and further in which at least one of the packages includes a stacked die package, or includes an additional stacked package. Also, a method for making a semiconductor multi-package module, by providing a lower molded package including a lower substrate and a die, affixing an upper molded package including an upper substrate in inverted orientation onto the upper surface of the lower package, in which one or both of the upper and lower packages is a stacked die package or in which one of the packages includes an additional stacked package, and forming z-interconnects between the upper and lower substrates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.