Arrangement of several resistors jointly positioned in a well of a semiconductor device, and a semiconductor device including at least one such arrangement
US7049930B2 · kind B2 · utility
0Cited by
9References
22Claims
0Family size
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Key dates
| Filing date | Sep 16, 2003 |
| Grant date | May 23, 2006 |
| Priority date | — |
| Expiry date | Nov 26, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/90
Abstract
An arrangement of several resistors jointly positioned in one and the same well of a semiconductor device, as well as to a semiconductor device including at least one such arrangement of resistors, wherein the resistors, when viewed in a longitudinal direction of the resistors, are displaced in relation to one another.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.