Asynchronous static random access memory
US7050324B2 · kind B2 · utility
26Cited by
9References
35Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 13, 2004 |
| Grant date | May 23, 2006 |
| Priority date | — |
| Expiry date | Jul 13, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/413
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A static random access memory (SRAM) is provided including a plurality of SRAM state elements and SRAM environment circuitry. The SRAM environment circuitry is operable to interface with external asynchronous circuitry and to enable reading of and writing to the SRAM state elements in a delay-insensitive manner provided that at least one timing assumption is met.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.