Method and system for architectural power estimation
US7051300B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 4, 2003 |
| Grant date | May 23, 2006 |
| Priority date | — |
| Expiry date | Jul 15, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method is provided for architectural integrated circuit power estimation. The method may include receiving a plurality of respective energy events, receiving a plurality of base-level energy models, and generating a plurality of power models. Each power model may hierarchically instantiate one or more of the base-level energy models. The method may further include mapping each respective energy event to one or more of the plurality of power models. The method may further include hierarchically evaluating a particular base-level energy model corresponding to a given respective energy event, estimating an energy associated with evaluation of the particular base-level energy model, and accumulating the energy in a power estimate corresponding to the given respective energy event.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.