Method for processing silicon using etching processes

US7052623B1 · kind B1 · utility

Assignee

• Robert Bosch GmbH · DE

Inventors

• Volker Becker · Marxzell, DE
• Franz Laermer · Stuttgart, DE
• Andrea Schilp · Schwäbisch Gmünd, DE

Key dates

• Filing date: Sep 22, 1999
• Grant date: May 30, 2006
• Expiry date: Sep 22, 2019

Classification

• Technology area (CPC B): Performing Operations; Transporting
• CPC primary: B81C2201/014
• WIPO field: Micro-structural and nano-technology
• WIPO sector: Chemistry

Abstract

A method is proposed for etching a first silicon layer (15) that is provided with an etching mask (10) for defining lateral recesses (21). In a first plasma etching process, trenches (21′) are produced in the region of the lateral recesses (21) by anisotropic etching. The first etching process comes virtually to a standstill as soon as a separating layer (12, 14, 14′, 16), buried between the first silicon layer (15) and a further silicon layer (17), is reached. This separating layer is thereupon etched through in exposed regions (23, 23′) by a second etching process. A subsequent third etching process then etches the further silicon layer (17, 17′). In this manner, free-standing structures for sensor elements can be produced in a simple process which is completely compatible with the method steps in IC integration technology.