Flange for integrated circuit package
US7053299B2 · kind B2 · utility
17Cited by
17References
54Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 18, 2004 |
| Grant date | May 30, 2006 |
| Priority date | — |
| Expiry date | Aug 18, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/24132
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A circuit package for housing semiconductor or other integrated circuit devices (“die”) includes a high-copper flange, one or more high-copper leads and a liquid crystal polymer frame molded to the flange and the leads. The flange includes a dovetail-shaped groove or other frame retention feature that mechanically interlocks with the molded frame. During molding, a portion of the frame forms a key that freezes in or around the frame retention feature.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.