Method and circuit for adjusting a resistance in an integrated circuit
US7054180B2 · kind B2 · utility
2Cited by
6References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2003 |
| Grant date | May 30, 2006 |
| Priority date | — |
| Expiry date | Jul 22, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/209
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method for adjusting a resistance in an integrated circuit, the resistance having a first conductive area and a second conductive area between which a dielectric area is arranged, a programming current being conducted through the resistance, the programming current being selected so as to adjust a resistance value of the resistance which is selected from a resistance range and is dependent on the programming current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.