Depopulated programmable logic array
US7055125B2 · kind B2 · utility
5Cited by
37References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 5, 2001 |
| Grant date | May 30, 2006 |
| Priority date | — |
| Expiry date | Sep 11, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17708
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable logic array (PLA) in accordance with the invention achieves a maximum amount of depopulation of programmable connections while still implementing a logic function and maintaining flexibility for future reprogramming. In addition, a PLA in accordance with the invention can be built so that no matter what functionality is programmed, performance characteristics for the device are maintained. Further, a PLA in accordance with the invention does not require a regular array structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.