Multiple operating voltage vertical replacement-gate (VRG) transistor

US7056783B2 · kind B2 · utility

Assignee

• Agere Systems Inc. · US

Inventors

• Paul Arthur Layman · Schreiber, CA
• John Russell McMacken · Orlando, US
• J. Ross Thomson · Clermont, US
• Samir Chaudhry · Orlando, US
• Jack Qingsheng Zhao · Orefield, US

Key dates

• Filing date: Oct 14, 2003
• Grant date: Jun 6, 2006
• Expiry date: May 4, 2024

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S438/981

Abstract

An architecture for creating multiple operating voltage MOSFETs. Generally, an integrated circuit structure includes a semiconductor area with a major surface formed along a plane and first and second spaced-apart doped regions formed in the surface. A third doped region forming a channel of different conductivity type than the first region is positioned over the first region. A fourth doped region of a different conductivity and forming a channel is positioned over the second region. The process of creating the gate structure for each of the two transistors allows for the formation of oxide layers of different thickness between the two transistors. The transistors are therefore capable of operating at different operating voltages (including different threshold voltages). Each transistor further includes fifth and sixth layers positioned respectively over the third and fourth regions and having an opposite conductivity type with respect to the third and fourth regions.In an associated method of manufacturing the semiconductor device, a first and second source/drain regions are formed in a semiconductor layer. A first field-effect transistor gate region, including a channel and a ga…