Semiconductor device with under bump metallurgy and method for fabricating the same
US7056818B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 27, 2004 |
| Grant date | Jun 6, 2006 |
| Priority date | — |
| Expiry date | Jul 27, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/014
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device with under bump metallurgy (UBM) and a method for fabricating the semiconductor device are provided, wherein a passivation layer is deposited on a surface of the semiconductor device where a plurality of bond pads are disposed, and formed with a plurality of openings for exposing the bond pads. A first metal layer is deposited over part of each of the bond pads and a portion of the passivation layer around the bond pad; then, a second metal layer is formed over the first metal layer and part of the bond pad uncovered by the first metal layer; subsequently, a third metal layer is formed over the second metal layer to thereby fabricate a UBM structure. Finally, a solder bump is formed on the UBM structure so as to achieve good bondability and electrical connection between the solder bump and UBM structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.