Electronic parts packaging structure and method of manufacturing the same
US7057290B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 5, 2004 |
| Grant date | Jun 6, 2006 |
| Priority date | — |
| Expiry date | Feb 5, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10674
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic parts packaging structure of the present invention includes a wiring substrate having a wiring pattern, a first insulating film which is formed on the wiring substrate and which has an opening portion in a packaging area where an electronic parts is mounted, the electronic parts having a connection terminal flip-chip mounted on the wiring pattern exposed in the opening portion of the first insulating film, a second insulating film for covering the electronic parts, a via hole formed in a predetermined portion of the first and second insulating films on the wiring pattern, and an upper wiring pattern formed on the second insulating film and connected to the wiring pattern through the via hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.