Flipflop
US7057421B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 22, 2004 |
| Grant date | Jun 6, 2006 |
| Priority date | — |
| Expiry date | Apr 22, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/356139
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A flipflop. In the flipflop, a differential pair is coupled to two input signals inverse to each other. A first latch unit is connected to the differential pair in parallel, and includes a first node and a second node coupled to generate complementary latch signals according to the first and second data signals. A signal amplification circuit is coupled to the differential pair and the first latch unit to generate complementary amplified signals according to the complementary latch signals. A second latch unit is coupled to the signal amplifier circuit to generate complementary static output signals according to the complementary amplified signals and to maintain the complementary static output signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.