Integrated high-speed serial-to-parallel and parallel-to-serial transceiver
US7058120B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 18, 2002 |
| Grant date | Jun 6, 2006 |
| Priority date | — |
| Expiry date | Apr 28, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W4/18
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A transceiver includes a receiver section and a transmitter section. The receiver section includes a clocking circuit, a serial-to-parallel module, and compensation. The transmitter section includes a clocking circuit, parallel-to-serial module, and compensation. The compensation within the receiver section and transmitter section compensates for integrated circuit (IC) processing limits and/or integrated circuit (IC) fabrication limits within the clocking circuits, serial-to-parallel module, and parallel-to-serial module that would otherwise limit the speed at which the transceiver could transport data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.