Patent · US Expired

Integrated memory and method of repairing an integrated memory

US7058851B2 · kind B2 · utility

0Cited by

9References

12Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Stephan Schröder · Birkenfeld, DE
Wolfgang Helfer · Birkenfeld, DE
Arndt Gruber · Birkenfeld, DE

Key dates

Filing date	Nov 25, 2002
Grant date	Jun 6, 2006
Priority date	—
Expiry date	May 31, 2024

Classification

Technology area (CPC G)Physics
CPC primaryG11C29/808
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method for repairing an integrated memory having first units of memory cells and second, redundant units of memory cells for replacing first units of memory cells. The first units of memory cells are tested with regard to their functionality. In the case of a defect ascertained in one of the first units, a number of redundant units is programmed as an associated cluster for replacing one or more of the first units. In this way, a repair element is formed with a cluster size corresponding to the number of redundant units. The cluster size of respective repair elements is set in a variable manner by a redundancy circuit. As a result, in a test and repair operation, a comparatively short test time of the memory is made possible in conjunction with a yield that remains good.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.