Components, methods and assemblies for multi-chip packages
US7061122B2 · kind B2 · utility
30Cited by
45References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 10, 2003 |
| Grant date | Jun 13, 2006 |
| Priority date | — |
| Expiry date | Oct 10, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1572
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An ultra thin system-in-a-package (SIP) with independent test and repair capability comprises an interposer having arranged on a top surface and a bottom surface thereof a number of packaged semiconductor chips mounted via solder bumps in accordance with a Land Grid Array (LGA) format and wherein no underfill is used on the SIP.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.