Semiconductor memory module
US7061784B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 8, 2004 |
| Grant date | Jun 13, 2006 |
| Priority date | — |
| Expiry date | Jul 17, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention relates to a semiconductor memory module having at least one memory chip and a buffer chip, which drives clock, address and command signals to the memory chip and drives data signals to, and receives them from, the memory chip via a module-internal clock, address, command and data bus. The buffer chip forms an interface to an external memory main bus. The data bus lines and/or the clock, command and address bus lines are respectively connected to the buffer chip at their two ends and are capable of being driven by the buffer chip from these two ends. Control means are being provided and set up in such a manner that they respectively match the directions of propagation of the data signals and of the clock, command and address signals on the corresponding bus lines during writing and reading.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.