Method and system for enforcing consistent per-physical page cacheability attributes
US7062631B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 17, 2003 |
| Grant date | Jun 13, 2006 |
| Priority date | — |
| Expiry date | Dec 12, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0837
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for enforcing consistent per-physical page cacheability attributes is disclosed. The method for enforcing consistent per-physical page cacheability attributes maintains memory coherency within a processor addressing memory, such as by comparing a desired cacheability attribute of a physical page address in a PTE against an authoritative table that indicates the current cacheability status. This comparison can be made at the time the PTE is inserted into a TLB. When the comparison detects a mismatch between the desired cacheability attribute of the page and the page's current cacheability status, corrective action can be taken to transition the page into the desired cacheability state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.