Alexander Klaiber
50Patents
13h-index
35Co-inventors
80Inventor score
Filing activity: Apr 2, 2003 → Mar 27, 2017
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7209994B1 | Processor that maintains virtual interrupt state and injects virtual interrupts into virtual machine guests | Physics | 134 | Expired |
| US7149872B2 | System and method for identifying TLB entries associated with a physical address of a specified range | Physics | 69 | Expired |
| US7380096B1 | System and method for identifying TLB entries associated with a physical address of a specified range | Physics | 61 | Active |
| US7913058B2 | System and method for identifying TLB entries associated with a physical address of a specified range | Physics | 57 | Active |
| US8239656B2 | System and method for identifying TLB entries associated with a physical address of a specified range | Physics | 56 | Active |
| US7418584B1 | Executing system management mode code as virtual machine guest | Physics | 47 | Expired |
| US7062631B1 | Method and system for enforcing consistent per-physical page cacheability attributes | Physics | 47 | Expired |
| US7707341B1 | Virtualizing an interrupt controller | Physics | 45 | Active |
| US8127098B1 | Virtualization of real mode execution | Physics | 40 | Active |
| US7873793B1 | Supporting speculative modification in a data cache | Physics | 21 | Active |
| US7225299B1 | Supporting speculative modification in a data cache | Physics | 15 | Expired |
| US7962909B1 | Limiting guest execution | Physics | 14 | Active |
| US7380098B1 | Method and system for caching attribute data for matching attributes with physical addresses | Physics | 13 | Active |
| US7937700B1 | System, processor, and method for incremental state save/restore on world switch in a virtual machine environment | Physics | 13 | Active |
| US7149851B1 | Method and system for conservatively managing store capacity available to a processor issuing stores | Physics | 12 | Expired |
| US7310723B1 | Methods and systems employing a flag for deferring exception handling to a commit or rollback point | Physics | 12 | Expired |
| US7089397B1 | Method and system for caching attribute data for matching attributes with physical addresses | Physics | 11 | Expired |
| US8473946B2 | Efficient recording and replaying of non-deterministic instructions in a virtual machine and CPU therefor | Physics | 9 | Active |
| US9547602B2 | Translation lookaside buffer entry systems and methods | Physics | 7 | Active |
| US7774583B1 | Processing bypass register file system and method | Physics | 6 | Active |
| US7606979B1 | Method and system for conservatively managing store capacity available to a processor issuing stores | Physics | 6 | Active |
| US7478226B1 | Processing bypass directory tracking system and method | Physics | 5 | Active |
| US9632976B2 | Lazy runahead operation for a microprocessor | Physics | 5 | Active |
| US7917740B1 | Virtualization assist for legacy x86 floating point exception handling | Physics | 3 | Active |
| US7620779B1 | System and method for handling direct memory accesses | Physics | 3 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.