Method for controlling a central processing unit for addressing in relation to a memory and controller
US7062632B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 2004 |
| Grant date | Jun 13, 2006 |
| Priority date | — |
| Expiry date | Nov 26, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3879
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention is based on the finding that free CPU operation code identifiers of a CPU or CPU operation code identifiers useable for any reason can be used to control supporting means upstream of the CPU, which is able to form, responsive to these operation code identifiers, a new, for example, physical address in relation to a second memory area having a second memory which is larger than the, for example, logic memory size addressable by the CPU. By means of the special operation code identifiers, it is thus possible in the course of an executable machine code to address the supporting means which monitors the data traffic via which the operation codes to be processed or the operation code identifiers are provided to the CPU, from the memory to the CPU, and which can take measures in relation to the new formed address when certain special operation code identifiers occur. In this way, on the one hand, a complicated redesign of the CPU and, on the other hand, the necessity of a software-resetting of the current memory window complicated as regards both the executable machine code and the processing speed are avoided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.