Optical proximity correction method
US7063923B2 · kind B2 · utility
1Cited by
2References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 1, 2004 |
| Grant date | Jun 20, 2006 |
| Priority date | — |
| Expiry date | Sep 1, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F1/26
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An integrated circuit layout includes dense figures and at least one isolated figure. A plurality of dummy patterns are formed to surround the isolated figure, so as to reduce the difference in pattern density of the integrated circuit layout. A transmitted light of the dummy patterns provides a phase difference of 0 or 180 degrees relative to a transmitted light of the integrated circuit layout. The integrated circuit layout and the plurality of dummy patterns are formed on a photo-mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.