Method of aligning a semiconductor substrate with a semiconductor alignment apparatus
US7063989B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2004 |
| Grant date | Jun 20, 2006 |
| Priority date | — |
| Expiry date | Nov 29, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/681
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor substrate is mounted on a semiconductor alignment apparatus. A chip alignment step is performed to center a central chip on the semiconductor substrate with respect to the semiconductor alignment apparatus, and to store the coordinates thereof. A semiconductor substrate alignment is performed to virtually align the semiconductor substrate with the semiconductor alignment apparatus. At this time, coordinates of a chip adjacent to the central chip and of a number of chips in a peripheral region of the semiconductor substrate are stored in the alignment apparatus. In addition, at least two templates are located in the central chip, and images and coordinates of the templates are stored in the semiconductor alignment apparatus during the semiconductor substrate alignment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.