Process for fabricating an electrical circuit comprising a polishing step
US7064053B2 · kind B2 · utility
1Cited by
6References
32Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Aug 29, 2003 |
| Grant date | Jun 20, 2006 |
| Priority date | — |
| Expiry date | Mar 26, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for fabricating an integrated electrical circuit comprises the formation and then the removal of conducting inserts. Components of the electrical circuit are incorporated into insulating materials superposed on top of a substrate. The process makes it possible to provide an exclusion volume around certain components sensitive to electrostatic coupling, while giving each insulating material a planar surface at the end of a polishing step.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.