Integrated electrical circuit and method for fabricating it
US7064439B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2000 |
| Grant date | Jun 20, 2006 |
| Priority date | — |
| Expiry date | May 11, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated electrical circuit having a plurality of structure planes is described. Electrically active elements are situated on at least one element structure plane, where at least one insulation layer is disposed above the element structure plane. Electrical connecting leads are disposed within and/or above the insulation layer, where at least a portion of the connecting leads contain copper. At least one diffusion blocker is disposed underneath the connecting leads, which diffusion blocker impedes and/or prevents the diffusion of copper. The integrated electrical circuit is configured according to the invention such that the diffusion blocker is configured as a blocker layer which is interrupted only in the region of contact holes and/or connection pieces and that the blocker layer is situated between the element structure plane and the insulation layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.