Multi-chip ball grid array package
US7064444B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 2004 |
| Grant date | Jun 20, 2006 |
| Priority date | — |
| Expiry date | Apr 20, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/924
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A multi-chip BGA package has two or more rerouted chips, each of which has one or more electrode plates. The electrode plate is coplanar with rerouting lines on the rerouted chip and may act as a decoupling capacitor, reducing simultaneous switching noise from fluctuations in power voltage, without causing an increase in thickness of the package. Further, each pair of rerouting lines on upper and lower rerouted chips includes two or more interconnection bumps. This reduces inductance and resistance of electric signal propagation. Therefore, the multi-chip BGA package of this invention can realize small, thin, high-speed and high-density memory devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.