System and method for speeding up EJTAG block data transfers
US7065675B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 8, 2001 |
| Grant date | Jun 20, 2006 |
| Priority date | — |
| Expiry date | Dec 9, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31705
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A system and method for providing efficient block transfer operations through a test access port uses a Fastdata register. The Fastdata register, in part, emulates a pending process access bit (“PrAcc”) typically found in a Control register associated with the test access port. When a Fastdata access (either a Fastdata upload or a Fastdata download) is requested by a probe coupled to the test access port, the Fastdata register is serially coupled to a data register also associated with the test access port. With these registers so coupled and through the operation of the Fastdata register, downloading and uploading data can be accomplished using a single register operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.