Selectable dynamic reconfiguration of programmable embedded IP
US7071726B1 · kind B1 · utility
4Cited by
9References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 1, 2004 |
| Grant date | Jul 4, 2006 |
| Priority date | — |
| Expiry date | Dec 1, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17744
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Improved communication, and an improved communication interface, between the core PLD fabric of a PLD and embedded IP building blocks resident therein is provided. A circuit according to the invention may include at least two different signal paths between the PLD core fabric and embedded IP building blocks. Either one, or both, of these two paths may be used for configuration and/or implementation of the embedded IP building blocks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.