Dual-purpose shift register
US7071729B2 · kind B2 · utility
3Cited by
3References
25Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 17, 2003 |
| Grant date | Jul 4, 2006 |
| Priority date | — |
| Expiry date | Feb 27, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C19/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A serial shift register and method for simultaneously storing bits of data and a serially advancing pointer is provided. In one embodiment, each stage of the shift register may have only two latches: one to store a bit of pointer information and one to store data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.