Antenna violation correction in high-density integrated circuits
US7073148B1 · kind B1 · utility
11Cited by
7References
14Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 11, 2003 |
| Grant date | Jul 4, 2006 |
| Priority date | — |
| Expiry date | Jan 27, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/39
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for correcting antenna violations in high-density integrated circuits (IC) begins by determining location of an antenna violation within a layout of a high-density integrated circuit. The processing continues by determining an affected input of a cell of the high-density integrated circuit based on the location of the antenna error. The processing then continues by identifying an available charge protection element. The processing further continues by logically coupling the available charge protection element to the affected input of the cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.