Patent · US Expired

System and apparatus for reducing the effects of circuit mismatch in analog-to-digital converters

US7075473B2 · kind B2 · utility

3Cited by
4References
21Claims
0Family size

Assignee

Inventor

Key dates

Filing dateApr 30, 2002
Grant dateJul 11, 2006
Priority date
Expiry dateApr 30, 2022

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M1/141
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A system and apparatus for reducing the effects of circuit mismatch in analog-to-digital converters is disclosed. In one form, an analog-to-digital converter (ADC) includes a switching network operable to couple an analog input received by a sample and hold module to a folding amplifier operable to process the analog input. The ADC further includes an averaging resistive network coupled to the folding amplifier and operable to provide an output representative of a portion of the analog input received by the folding amplifier to produce a digital representation of the analog input.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.