Method and system for improving integrated circuit manufacturing productivity

US7076749B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Douglas W. Kemerer · South Burlington, US
• Daniel N. Maynard · Craftsbury Common, US
• Gustavo E. Tellez · South Burlington, US
• Lijiang Wang · Chandler, US
• Peter S. Wissell · Cambridge, US

Key dates

• Filing date: May 28, 2004
• Grant date: Jul 11, 2006
• Expiry date: Dec 30, 2024

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y02P90/02
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A method and a system for improving manufacturing productivity of an integrated circuit. The method including: (a) generating a set of physical design rules, (b) assigning a rule scoring equation to each physical design rule of the set of physical design rules; (c) checking a physical design of the integrated circuit for deviations from each design rule; (d) computing a score for each physical design rule, using the corresponding rule scoring equation assigned to each physical design rule, for which one or more deviations were found in step (c); and (e) computing a productivity score for the integrated circuit design based on the scores computed in step (d).