Semiconductor device and fabrication method thereof
US7078810B2 · kind B2 · utility
7Cited by
3References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 1, 2004 |
| Grant date | Jul 18, 2006 |
| Priority date | — |
| Expiry date | Dec 1, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/60
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device and fabrication thereof. An opening is formed in a first dielectric layer, exposing an active region of the transistor, and an atomic layer deposited (ALD) TaN barrier is conformably formed in the opening, at a thickness less than 20 Å. A copper layer is formed over the atomic layer deposited (ALD) TaN barrier to fill the opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.