Resistive cross point memory
US7079436B2 · kind B2 · utility
107Cited by
7References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2003 |
| Grant date | Jul 18, 2006 |
| Priority date | — |
| Expiry date | Sep 30, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2254
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention provide a resistive cross point memory. The resistive cross point memory comprises an array of memory cells and a read circuit. The read circuit is configured to sense a resistance through a memory cell in the array of memory cells to obtain a sense result and calibrate the read circuit based on the sensed result. The read circuit comprises an up/down counter that provides a calibration value to the read circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.