Circuit apparatus and method for testing integrated circuits using weighted pseudo-random test patterns
US7080298B2 · kind B2 · utility
1Cited by
7References
11Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Feb 4, 2003 |
| Grant date | Jul 18, 2006 |
| Priority date | — |
| Expiry date | Nov 17, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318547
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method for testing an electronic circuit includes selecting an input signal using a first multiplexer, selecting a signal to be input to the first multiplexer using at least one other multiplexer, and controlling the at least one other multiplexer using a selection signal output from a control circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.