Naoki Kiryu
18Patents
8h-index
10Co-inventors
61Inventor score
Filing activity: Feb 4, 2003 → Sep 23, 2010
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7461309B2 | Systems and methods for providing output data in an LBIST system having a limited number of output ports | Physics | 23 | Expired |
| US7103495B2 | System and method for burn-in test control | Physics | 15 | Expired |
| US7484153B2 | Systems and methods for LBIST testing using isolatable scan chains | Physics | 13 | Expired |
| US7475311B2 | Systems and methods for diagnosing rate dependent errors using LBIST | Physics | 12 | Active |
| US8208325B2 | Semiconductor device, semiconductor package and memory repair method | Physics | 11 | Active |
| US7055077B2 | Systems and methods for circuit testing | Physics | 11 | Expired |
| US7558996B2 | Systems and methods for identifying errors in LBIST testing | Physics | 11 | Active |
| US7266745B2 | Programmable scan shift speed control for LBIST | Physics | 8 | Expired |
| US7308634B2 | Systems and methods for LBIST testing using multiple functional subphases | Physics | 7 | Expired |
| US7627798B2 | Systems and methods for circuit testing using LBIST | Physics | 7 | Expired |
| US7350124B2 | Method and apparatus for accelerating through-the pins LBIST simulation | Physics | 6 | Expired |
| US7681098B2 | Systems and methods for improved fault coverage of LBIST testing | Physics | 5 | Active |
| US7631237B2 | Multi-test method for using compare MISR | Physics | 3 | Active |
| US7080298B2 | Circuit apparatus and method for testing integrated circuits using weighted pseudo-random test patterns | Physics | 1 | Expired |
| US7797600B2 | Method and apparatus for testing a ring of non-scan latches with logic built-in self-test | Physics | 1 | Active |
| US7406640B2 | Method and apparatus for testing a ring of non-scan latches with logic built-in self-test | Physics | 1 | Active |
| US7478304B2 | Apparatus for accelerating through-the-pins LBIST simulation | Physics | 0 | Active |
| US8130570B2 | Data transfer circuit | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.