Double-sided etching technique for semiconductor structure with through-holes
US7081412B2 · kind B2 · utility
3Cited by
20References
14Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 5, 2004 |
| Grant date | Jul 25, 2006 |
| Priority date | — |
| Expiry date | Oct 5, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49126
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
Double-sided etching techniques are disclosed for providing a semiconductor structure with one or more through-holes. The through-holes may be sealed hermetically such as by a feed-through metallization process. The feed-through metallization process may provide electrical contact to an opto-electronic or integrated circuit encapsulated in a package with the semiconductor structure used as a lid.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.