Substrate via layout to improve bias humidity testing reliability
US7081672B1 · kind B1 · utility
6Cited by
8References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 7, 2005 |
| Grant date | Jul 25, 2006 |
| Priority date | — |
| Expiry date | Mar 7, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09609
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A substrate is provided, which has a pattern of voltage supply vias extending through at least a portion of the substrate. Each of a plurality of the voltage supply vias is surrounded by four of the voltage supply vias of a same polarity in four orthogonal directions and by four voltage supply vias of an opposite polarity in four diagonal directions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.