Locked loop with dual rail regulation
US7081782B2 · kind B2 · utility
11Cited by
0References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 17, 2005 |
| Grant date | Jul 25, 2006 |
| Priority date | — |
| Expiry date | May 17, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0816
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus having a dual rail regulated reference loop. The reference loop includes a delay circuit powered by upper and lower supply voltages to generate a plurality of reference clock signals, and a voltage regulation circuit to adjust the upper and lower supply voltages according to a phase difference between a selected pair of the reference clock signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.