Integrated circuit layout and a semiconductor device manufactured using the same
US7084440B2 · kind B2 · utility
12Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 28, 2003 |
| Grant date | Aug 1, 2006 |
| Priority date | — |
| Expiry date | Mar 6, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
Abstract
An integrated circuit layout and a semiconductor device manufactured using the same are provided. According to one embodiment, a semiconductor device has a substrate and a plurality of bar type patterns on the substrate. The bar type patterns are substantially parallel to each other. At least one of the bar type patterns includes first and second ends and a middle part therebetween. The bar type patterns has an overhang at the first end thereof. The bar type patterns may be gate patterns, bit line patterns or active patterns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.