Jong-Sun Sel
40Patents
6h-index
44Co-inventors
65Inventor score
Filing activity: Apr 29, 2002 → Feb 8, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7480178B2 | NAND flash memory device having dummy memory cells and methods of operating same | Physics | 42 | Active |
| US7881114B2 | NAND flash memory device having dummy memory cells and methods of operating same | Physics | 21 | Active |
| US7399672B2 | Methods of forming nonvolatile memory devices | Electricity | 13 | Active |
| US7084440B2 | Integrated circuit layout and a semiconductor device manufactured using the same | Electricity | 12 | Expired |
| US7812375B2 | Non-volatile memory device and method of fabricating the same | Electricity | 10 | Active |
| US8045383B2 | Non-volatile memory devices including dummy word lines and related structures and methods | Physics | 9 | Active |
| US8085592B2 | Charge-trap flash memory device with reduced erasure stress and related programming and erasing methods thereof | Physics | 6 | Active |
| US6828637B2 | Semiconductor memory devices having dummy active regions | Electricity | 6 | Expired |
| US7776687B2 | Semiconductor device having a gate contact structure capable of reducing interfacial resistance and method of forming the same | Electricity | 5 | Active |
| US7397093B2 | Semiconductor devices with sidewall conductive patterns methods of fabricating the same | Electricity | 5 | Expired |
| US6740940B2 | Semiconductor memory devices having dummy active regions | Electricity | 5 | Expired |
| US8198157B2 | Methods of forming non-volatile memory devices including dummy word lines | Physics | 3 | Active |
| US9711522B2 | Memory hole structure in three dimensional memory | Physics | 3 | Active |
| US7605430B2 | Nonvolatile memory devices having a fin shaped active region and methods of fabricating the same | Electricity | 3 | Active |
| US8228738B2 | NAND flash memory device having dummy memory cells and methods of operating same | Physics | 3 | Active |
| US7645644B2 | Data line layout in semiconductor memory device and method of forming the same | Electricity | 2 | Active |
| US7863686B2 | Nonvolatile memory devices having a fin shaped active region | Electricity | 2 | Active |
| US7795643B2 | Cell array of semiconductor memory device and a method of forming the same | Physics | 2 | Active |
| US6806518B2 | Semiconductor memory devices having dummy active regions | Electricity | 2 | Expired |
| US8372711B2 | Methods of fabricating semiconductor devices with sidewall conductive patterns | Electricity | 1 | Active |
| US8675409B2 | Non-volatile memory devices | Physics | 1 | Active |
| US7666717B2 | Non-volatile memory devices including fuse covered field regions | Electricity | 1 | Active |
| US7572684B2 | Nonvolatile memory devices and methods of forming the same | Emerging Cross-Sectional Technologies | 1 | Active |
| US8329574B2 | Methods of fabricating flash memory devices having shared sub active regions | Emerging Cross-Sectional Technologies | 0 | Active |
| US8237199B2 | Cell array of semiconductor memory device and a method of forming the same | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.