Distributed random access memory in a programmable logic device
US7084665B1 · kind B1 · utility
14Cited by
18References
33Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 22, 2004 |
| Grant date | Aug 1, 2006 |
| Priority date | — |
| Expiry date | Dec 23, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17736
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Distributed random access memory in a programmable logic device uses configuration RAM bits as bits of the distributed RAM. A single write path is used to provide both configuration data and user write data. Selection circuitry, such as a multiplexer, is used to determine whether the single write path carries configuration data or user write data. In another aspect of the invention, the configuration RAM bits are used as to construct a shift register by adding pass transistors to chain the configuration RAM bits together, and clocking alternate pass transistors with two clocks 180° out of phase with one another.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.