Configuration in a configurable system on a chip
US7085858B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2004 |
| Grant date | Aug 1, 2006 |
| Priority date | — |
| Expiry date | Dec 16, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention allows a user to customize the configuration sequence of a configurable system on a chip (CSoC), thereby adding considerable flexibility to the configuration process. The present invention also provides certain features, transparent to the user, which optimize system resources and ensure the correct initialization of the CSoC. The CSoC leverages an on-chip central processing unit (CPU) to control the configuration process of the configurable system logic (CSL). Advantageously, the CSL configuration memory cells as well as other programmable locations in the CSoC are addressable as part of a system bus address space. The system bus is a multi-use structure that can be used for both configuring and reading of memory cells. In this manner, the CSoC optimizes system resources.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.