Semiconductor memory device
US7085881B2 · kind B2 · utility
1Cited by
17References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 9, 2003 |
| Grant date | Aug 1, 2006 |
| Priority date | — |
| Expiry date | Feb 11, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/229
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes a bit line, a memory cell coupled to the bit line and a word line coupled to the memory cell. A first time between receiving a write command for a write operation in order to write data to the memory cell and the beginning of the write operation is different from a second time between receiving a refresh command for a refresh operation in order to refresh data stored in the memory cell and beginning the write operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.