Locally thinned fins
US7087471B2 · kind B2 · utility
35Cited by
7References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 15, 2004 |
| Grant date | Aug 8, 2006 |
| Priority date | — |
| Expiry date | Mar 15, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0245
Abstract
In a FinFET integrated circuit, the fins are formed with a reduced body thickness in the body area and then thickened in the S/D area outside the body to improve conductivity. The thickening is performed with epitaxial deposition while the lower portion of the gates are covered by a gate cover layer to prevent thickening of the gates at the fin level, which may short the gate to the S/D.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.