Ballast resistors for transistor devices
US7087973B2 · kind B2 · utility
13Cited by
14References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 1, 2003 |
| Grant date | Aug 8, 2006 |
| Priority date | — |
| Expiry date | Aug 2, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/153
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A transistor is formed with a source ballast resistor that regulates channel current. In an LDMOS transistor embodiment, the source ballast resistance may be formed using a high sheet resistance diffusion self aligned to the polysilicon gate, and/or by extending a depletion implant from under the polysilicon gate toward the source region. The teachings herein may be used to form effective ballast resistors for source and/or drain regions, and may be used in many types of transistors, including lateral and vertical transistors operating in a depletion or an enhancement mode, and BJT devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.